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00457nam ac200169 k 4500
000003565925
20220101120000
ta
010731s1976 US 000 eng
▼a 211070
▼c 211070
▼l WM0003017251
▼a TK7868.D5
▼a TK7868.D5
▼b W3
▼a LOGIC DESIGN PROJECTS USING STANDARD INTEGRATED CIRCUITS/
▼d WAKERLY,JOHN F
▼a NEW YORK:
▼b JOHN WILEY & SONS,
▼c 1976.
▼a 203p.
▼a WAKERLY,JOHN F
▼a 단행본
| 자료유형 : | 단행본 |
|---|---|
| 분류기호 : | TK7868.D5 |
| 서명/저자사항 : | LOGIC DESIGN PROJECTS USING STANDARD INTEGRATED CIRCUITS/ WAKERLY,JOHN F |
| 발행사항 : | NEW YORK: JOHN WILEY & SONS, 1976. |
| 형태사항 : | 203p. |
| 개인저자 : | WAKERLY,JOHN F |
| 언어 | 영어 |
WMO199918477
권 호 : 203
발행년 : 1976
서 명 : LOGIC DESIGN PROJECTS USING STANDARD INTEGRATED CIRCUITS
발행처 : WAKERLY,JOHN F
목차
1. LOGIC BREADBOARDS
2. DOCUMENTATION STANDARDS
3. DESIGN AND DEBUGGING TECHNIQUES
4. A-SERIES INTRODUCTORY ONE-WEEK PROJECTS
5. B-SERIES TWO-WEEK PROJECTS
6. C-SERIES THREE-WEEK PROJECTS
7. D-SERIES FOUR-WEEK PROJECTS
8. MICROPROCESSOR PROJECTS
서평쓰기