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00524nam ac200193 k 4500
000003750839
20220101120000
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010731s2000 US 000 eng
▼a 3540674810
▼a 211070
▼c 211070
▼l WM0003035244
▼a QA76.9.A73
▼a QA76.9.A73
▼b M845
▼a Computer Architecture:
▼b Complexity and Correctness/
▼d Mueller,Silvia M;
▼e Paul,Wolfgang J
▼a Berlin:
▼b Springer,
▼c 2000.
▼a 553p.
▼a Mueller,Silvia M
▼a Paul,Wolfgang J
▼a 단행본
| 자료유형 : | 단행본 |
|---|---|
| ISBN : | 3540674810 |
| 분류기호 : | QA76.9.A73 |
| 서명/저자사항 : | Computer Architecture: Complexity and Correctness/ Mueller,Silvia M; Paul,Wolfgang J |
| 발행사항 : | Berlin: Springer, 2000. |
| 형태사항 : | 553p. |
| 개인저자 : | Mueller,Silvia M |
| 개인저자 : | Paul,Wolfgang J |
| 언어 | 영어 |
WMO200014093
권 호 : 553
발행년 : 2000
서 명 : Computer Architecture
발행처 : Mueller,Silvia M
목차
1. Basics
2. A Sequential DLX Design
3. Interrupt Handling
4. Memory System Design
5. IEEE Floating Point Standard and Theory of Rounding
6. Floating Point Algorithms and Data Paths
7. Pipelined DLX Machine with Floating Point Core
Multivariate data analysis 8th ed
QA278 H153
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