MARC 닫기

• LDR

  06929cam a2200745Ii 4500

• 001

  000001334059

• 005

  20210114162941

• 006

  m d

• 007

  cr cn|||||||||

• 008

  180514t20182018enka ob 001 0 eng d

• 019

  ▼a  1057434126

• 020

  ▼a  1785615629
  ▼q  (pdf)

• 020

  ▼a  9781523121175
  ▼q  (electronic bk.)

• 020

  ▼a  1523121173
  ▼q  (electronic bk.)

• 020

  ▼a  9781785615627
  ▼q  (electronic bk.)

• 020

  ▼z  9781785615610
  ▼q  (hardback)

• 020

  ▼z  1785615610
  ▼q  (hardback)

• 035

  ▼a  2000720
  ▼b  (N$T)

• 035

  ▼a  (OCoLC)1035556119
  ▼z  (OCoLC)1057434126

• 040

  ▼a  LGG
  ▼b  eng
  ▼e  rda
  ▼e  pn
  ▼c  LGG
  ▼d  LGG
  ▼d  CDN
  ▼d  UIU
  ▼d  OCLCF
  ▼d  OTZ
  ▼d  STF
  ▼d  UAB
  ▼d  U3G
  ▼d  YDX
  ▼d  CUS
  ▼d  EBLCP
  ▼d  CUV
  ▼d  VLB
  ▼d  OCLCQ
  ▼d  ERF
  ▼d  KNOVL
  ▼d  OCLCQ
  ▼d  N$T
  ▼d  248023

• 050

  ▼a  HQ1090
  ▼b  .G83 2018eb

• 072

  ▼a  B0100
  ▼2  inspec

• 072

  ▼a  B1265B
  ▼2  inspec

• 072

  ▼a  B1265A
  ▼2  inspec

• 072

  ▼a  C0000
  ▼2  inspec

• 072

  ▼a  C5210
  ▼2  inspec

• 072

  ▼a  C5110
  ▼2  inspec

• 072

  ▼a  C5120
  ▼2  inspec

• 082

  ▼a  621.3815
  ▼2  23

• 100

  ▼a  Guckert, Lauren,
  ▼e  author.

• 245

  ▼a  System design with memristor technologies /:
  ▼c  Lauren Guckert and Earl E. Swartzlander, Jr.

• 260

  ▼a  Herts, United Kingdom:
  ▼b  The Institution of Engineering and Technology,
  ▼c  2018.

• 300

  ▼a  1 online resource (ix, 354 pages):
  ▼b  illustrations.

• 336

  ▼a  text
  ▼b  txt
  ▼2  rdacontent

• 337

  ▼a  computer
  ▼b  c
  ▼2  rdamedia

• 338

  ▼a  online resource
  ▼b  cr
  ▼2  rdacarrier

• 490

  ▼a  IET materials, circuits and devices series;
  ▼v  38

• 504

  ▼a  Includes bibliographical references (pages 341-346) and index.

• 505

  ▼a  Intro; Contents; 1. Introduction; 1.1 Memristor fundamentals; 1.1.1 Types of memristors; 1.1.2 Memristor logic; 1.2 Note on simulation methodology; 1.3 Memristor models; 1.4 Crossbar technology; 2. Memristor logic gates; 2.1 IMPLY gates; 2.1.1 IMPLY Boolean logic; 2.1.2 Real implementation; 2.2 MAD gates; 2.2.1 MAD metrics, pros, and cons; 2.2.2 Implementation in a crossbar; 2.2.3 Gate adaptation; 2.2.4 Crossbar adaptation; 2.2.5 Boolean operation and threshold gate selection; 2.3 N-N memristor gates; 2.4 Hybrid-CMOS gates; 2.5 Threshold gates

• 505

  ▼a  2.5.1 Threshold gates implemented with GOTO pairs2.5.2 Threshold gates implemented with CSTG gates; 2.6 MAGiC gates; 3. Adder arithmetic units; 3.1 Ripple-carry adders; 3.2 Carry-lookahead adders; 3.3 Carry-select adders; 3.4 Conditional-sum adders; 4. Multiplier arithmetic units; 4.1 Shift-and-add multipliers; 4.1.1 Booth multiplier; 4.2 Array multipliers; 4.3 Dadda multipliers; 5. Divider arithmetic units; 5.1 Binary restoring dividers; 5.2 SRT dividers; 5.3 Goldschmidt dividers; 6. Memristor-based adder designs; 6.1 Ripple Carry Adders; 6.1.1 IMPLY ripple-carry adder

• 505

  ▼a  6.1.2 Hybrid-CMOS ripple-carry adder6.1.3 Threshold gate ripple-carry adder; 6.1.4 MAD gate ripple-carry adder; 6.1.5 Ripple-carry adder analysis and comparison; 6.2 Carry Lookahead adders; 6.2.1 IMPLY carry-lookahead adder; 6.2.2 Hybrid-CMOS carry-lookahead adder; 6.2.3 Threshold gate carry-lookahead adder; 6.2.4 MAD gate carry-lookahead adder; 6.2.5 Carry-lookahead adder analysis and comparison; 6.3 Carry-select adders; 6.3.1 IMPLY carry-select adder; 6.3.2 Hybrid-CMOS carry-select adder; 6.3.3 Threshold gate carry-select adder; 6.3.4 MAD gate carry-select adder

• 505

  ▼a  6.3.5 Carry-select adder analysis and comparison6.4 Conditional-sum adders; 6.4.1 IMPLY conditional-sum adder; 6.4.2 Hybrid-CMOS conditional-sum adder; 6.4.3 Threshold gate conditional-sum adder; 6.4.4 MAD gate conditional-sum adder; 6.4.5 Conditional-sum adder analysis and comparison; 7. Memristor-based multiplier designs; 7.1 Shift-and-add multipliers; 7.1.1 IMPLY shift-and-add multiplier; 7.1.2 Hybrid-CMOS shift-and-add multiplier; 7.1.3 Threshold-gate shift-and-add multiplier; 7.1.4 MAD gate shift-and-add multiplier; 7.1.5 Shift-and-add multiplier analysis and comparison

• 505

  ▼a  7.1.6 IMPLY and MAD Booth multipliers7.2 Array multipliers; 7.2.1 IMPLY array multiplier; 7.2.2 Hybrid-CMOS array multiplier; 7.2.3 Threshold-gate array multiplier; 7.2.4 MAD gate array multiplier; 7.2.5 Array multiplier analysis and comparison; 7.3 Dadda multipliers; 7.3.1 IMPLY Dadda multiplier; 7.3.2 Hybrid-CMOS Dadda multiplier; 7.3.3 Threshold gate Dadda multiplier; 7.3.4 MAD gate Dadda multiplier; 7.3.5 Dadda multiplier analysis and comparison; 8. Memristor-based divider designs; 8.1 Binary-restoring dividers; 8.1.1 IMPLY binary-restoring divider

• 520

  ▼a  Memristors are a new class of circuit element with the ability to change their resistance value while retaining memory of their current and past resistances. Their small form factor, high density, and fast switching times have sparked research into their applications in modern memory hierarchies. However, these new components pose system design challenges, as well as opportunities. System Design with Memristor Technologies explores design solutions for memristors, covering research and development trends in memristor technology, fabrication, modelling, and applications, and the design and implementation of arithmetic units using memristors. The book begins with an introduction to the principles of system design with memristors, then goes on to address memristor logic gates, arithmetic units for adders, multipliers and dividers, and improved and optimised adder, multiplier and divider designs. The final chapters draw conclusions from the topics covered and explore potential future trends in research into system designs with memristor technologies. This book is essential reading for research scientists and electronics engineers interested in the use of memristors in future system architectures, specifically focused on the areas of arithmetic units, non-Von-Neumann architectures, and logic-in-memory

• 588

  ▼a  Print version record.

• 590

  ▼a  Added to collection customer.56279.3

• 650

  ▼a  Memristors.

• 650

  ▼a  Memristors.
  ▼2  fast
  ▼0  (OCoLC)fst01894553

• 650

  ▼a  adders.
  ▼2  inspect

• 650

  ▼a  dividing circuits.
  ▼2  inspect

• 650

  ▼a  logic design.
  ▼2  inspect

• 650

  ▼a  logic gates.
  ▼2  inspect

• 650

  ▼a  memristor circuits.
  ▼2  inspect

• 650

  ▼a  multiplying circuits.
  ▼2  inspect

• 655

  ▼a  Electronic books.

• 700

  ▼a  Swartzlander, Earl E.,
  ▼c  Jr.,
  ▼d  1945-,
  ▼e  author.

• 776

  ▼i  Print version:
  ▼a  Guckert, Lauren.
  ▼t  System design with memristor technologies.
  ▼d  Herts, United Kingdom : The Institution of Engineering and Technology, 2018,
  ▼z  1785615610,
  ▼z  9781785615610
  ▼w  (OCoLC)1012552409

• 830

  ▼a  Materials, circuits and devices series;
  ▼v  38.

• 856

  ▼3  EBSCOhost
  ▼u  http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=2000720

• 938

  ▼a  ProQuest Ebook Central
  ▼b  EBLB
  ▼n  EBL5667531

• 938

  ▼a  YBP Library Services
  ▼b  YANK
  ▼n  15999262

• 938

  ▼a  EBSCOhost
  ▼b  EBSC
  ▼n  2000720

• 990

  ▼a  강리원

• 991

  ▼a  eBook

• 994

  ▼a  92
  ▼b  N$T