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• LDR

  00889nam a22002411u 45x0

• 001

  000000335706

• 005

  20120927132230

• 008

  921006s1993 us a b 001 eng

• 010

  ▼a  92038496

• 020

  ▼a  0792392949 (acid-free paper)

• 040

  ▼a  DLC
  ▼c  DLC

• 049

  ▼a  KMAL
  ▼l  AZ0000158486

• 082

  ▼a  621.3819535
  ▼2  20

• 090

  ▼a  621.3819535
  ▼b  Sh5a

• 245

  ▼a  Algorithms for VLSI physical design automation/
  ▼d  by Naveed A. Sherwani.

• 260

  ▼a  Boston:
  ▼b  Kluwer Academic Publishers,
  ▼c  c1993.

• 300

  ▼a  xxiv, 488 p.:
  ▼b  ill.;
  ▼c  25 cm.

• 504

  ▼a  Includes bibliographical references (p. 453-478) and indexes.

• 650

  ▼a  Integrated circuits
  ▼x  Very large scale integration
  ▼x  Design and construction
  ▼x  Data processing.

• 650

  ▼a  Computer-aided design.

• 650

  ▼a  Algorithms.

• 653

  ▼a  ALGORITHMS
  ▼a  FOR
  ▼a  VLSI
  ▼a  PHYSICAL
  ▼a  DESIGN
  ▼a  AUTOMATION

• 700

  ▼a  Sherwani, N. A.
  ▼q  (Naveed A.),

• 991

  ▼a  단행본

• 090

  ▼a  621.3819535
  ▼b  Sh5a