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• LDR

  01199nam 2200289 k 4500

• 001

  000000669460

• 005

  2051130121000

• 008

  971021s1996 us a 001a eng

• 020

  ▼a  0792397444:
  ▼c  Dfl175.00

• 040

  ▼a  248023
  ▼c  248023

• 049

  ▼l  EM128956

• 082

  ▼a  621.3822

• 090

  ▼a  621.3822
  ▼b  R762q

• 100

  ▼a  Romdhane, Mohamed S. Ben,
  ▼d  1964-.

• 245

  ▼a  Quick-turnaround ASIC design in VHDL:
  ▼b  core-based behavioral synthesis/
  ▼d  by Mohamed S. Ben Romdhane;
  ▼e  Vijay K. Madisetti;
  ▼e  John W. Hines.

• 260

  ▼a  Boston:
  ▼b  Kluwer academic,
  ▼c  1996.

• 300

  ▼a  xⅷ,180p.:
  ▼b  illus.;
  ▼c  24cm.

• 440

  ▼a  Kluwer international series in engineering and computer science;
  ▼v  v.367.
  ▼a  VLSI, computer architecture, and digital signal processing

• 504

  ▼a  Includes bibliographical references and index

• 653

  ▼a  QUICK
  ▼a  TURNAROUND
  ▼a  ASIC
  ▼a  DESIGN
  ▼a  VHDL

• 700

  ▼a  Madisetti, Vijay K.,
  ▼e  jt,

• 700

  ▼a  Hines, John W.,
  ▼e  jt,

• 949

  ▼a  VLSI computer architecture and digital signal processing

• 950

  ▼b  \87500

• 965

  ▼a  Application specific integrated circuits-
  ▼x  design-
  ▼x  data processing

• 965

  ▼a  VHDL (computer hardware description language)

• 965

  ▼a  Computer-aided design

• 991

  ▼a  단행본

• 090

  ▼a  621.3822
  ▼b  R762q