MARC 닫기

• LDR

  01243nam 2200289 k 4500

• 001

  000000663523

• 005

  2051130121000

• 008

  970906s1997 us a 001a eng

• 020

  ▼a  0792398297:
  ▼c  Dfl165.00

• 040

  ▼a  248023
  ▼c  248023

• 049

  ▼l  EM128618

• 082

  ▼a  621.395

• 090

  ▼a  621.395
  ▼b  M775c

• 100

  ▼a  Monteiro, Jose,
  ▼d  1966-.

• 245

  ▼a  Computer-aided design techniques for low power sequential logic circuits/
  ▼d  by Jose Monteiro;
  ▼e  Srinivas Devadas.

• 260

  ▼a  Boston:
  ▼b  Kluwer academic,
  ▼c  1997.

• 300

  ▼a  xⅲ,181p.:
  ▼b  illus.;
  ▼c  25cm.

• 490

  ▼a  (The )Kluwer international series in engineering and computer science VLSI, computer architecture, and digital signal processing

• 504

  ▼a  Includes bibliographical references and index

• 653

  ▼a  COMPUTER
  ▼a  AIDED
  ▼a  DESIGN
  ▼a  TECHNIQUES
  ▼a  LOW
  ▼a  POWER
  ▼a  SEQUENTIAL
  ▼a  LOGIC
  ▼a  CIRCUITS

• 700

  ▼a  Devadas, Srinivas,
  ▼e  jt,

• 949

  ▼a  Kluwer international series in engineering and computer science;
  ▼v  SECS 387

• 950

  ▼b  \82500

• 965

  ▼a  Logic circuits-
  ▼x  design and construction-
  ▼x  data processing

• 965

  ▼a  Logic design-
  ▼x  data processing

• 965

  ▼a  Low voltage integrated circuits-
  ▼x  design and construction-
  ▼x  data processing

• 965

  ▼a  Computer-aided design

• 991

  ▼a  단행본

• 090

  ▼a  621.395
  ▼b  M775c