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01924nam ac200265 k 4500
000000159413
20220617194025
ta
091008s2010 nyua 000 0 eng
▼a 9780521872447 (hardback)
▼a 243002
▼c 111314
▼d 111314
▼a 621.395
▼b B415d
▼a Beerel, Peter A.
▼a (A) Designer's guide to asynchronous VLSI /
▼d [by] Peter A. Beerel ,
▼e Recep O. Ozdag ,
▼e Marcos Ferretti.
▼a New York:
▼b Cambridge University Press,
▼c 2010.
▼a xii, 339 p.:
▼b ill.;
▼c 26 cm.
▼a Machine generated contents note: 1. Introduction; 2. Channel-based asynchronous design; 3. Modeling channel-based designs; 4. Pipeline performance; 5. Performance analysis and optimization; 6. Deadlock; 7. A taxonomy of design styles; 8. Synthesis-based controller design; 9. Micropipeline design; 10. Syntax-directed translation; 11. QDI pipeline templates; 12. Timed pipeline templates; 13. Single-track pipeline templates; 14. Asynchronous crossbar.
▼a "Bypass the limitations of synchronous design and create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. The fundamentals of asynchronous design are covered, as is a large variety of design styles, while the emphasis throughout is on practical techniques and real-world applications"--Provided by publisher.
▼a "This book provides an introduction to this diverse area of VLSI from a designer's point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future"--Provided by publisher.
▼a Integrated circuits
▼x Very large scale integration
▼x Computer-aided design.
▼a Integrated circuits
▼x Very large scale integration
▼x Design and construction.
▼a Ozdag, Recep O,
▼a Ferretti, Marcos,
▼b $120.00
▼a FUTURE
▼a 단행본
| 자료유형 : | 단행본 |
|---|---|
| ISBN : | 9780521872447 (hardback) |
| 분류기호 : | 621.395 |
| 개인저자 : | Beerel, Peter A. |
| 서명/저자사항 : | (A) Designer's guide to asynchronous VLSI / [by] Peter A. Beerel , Recep O. Ozdag , Marcos Ferretti. |
| 발행사항 : | New York: Cambridge University Press, 2010. |
| 형태사항 : | xii, 339 p.: ill.; 26 cm. |
| 내용주기 : | Machine generated contents note: 1. Introduction; 2. Channel-based asynchronous design; 3. Modeling channel-based designs; 4. Pipeline performance; 5. Performance analysis and optimization; 6. Deadlock; 7. A taxonomy of design styles; 8. Synthesis-based controller design; 9. Micropipeline design; 10. Syntax-directed translation; 11. QDI pipeline templates; 12. Timed pipeline templates; 13. Single-track pipeline templates; 14. Asynchronous crossbar. |
| 요약 : | "Bypass the limitations of synchronous design and create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. The fundamentals of asynchronous design are covered, as is a large variety of design styles, while the emphasis throughout is on practical techniques and real-world applications"--Provided by publisher. |
| 요약 : | "This book provides an introduction to this diverse area of VLSI from a designer's point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future"--Provided by publisher. |
| 일반주제명 : | Integrated circuits -- Very large scale integration -- Computer-aided design. -- |
| 일반주제명 : | Integrated circuits -- Very large scale integration -- Design and construction. -- |
| 개인저자 : | Ozdag, Recep O, |
| 개인저자 : | Ferretti, Marcos, |
| 언어 | 영어 |
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